problem about pipelining-Collection of common programming errors

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  Stefan K.
  assembly gpu instruction-set pipelining cpu-cycles
  I’m trying to understand what machine code the OpenCL compiler produces in order to optimize it. Therefore I used the tool m2s-opencl-kc (from multi2sim) to offline-compile my *.cl file and keep intermediate files (switch: -a) as the *.isa file. This *.isa contains a “Disassembly” section, which seems to be what I’m looking for…Note: My assembly knowledge is a bit “old”. I produced assembly for older CPUs like Pentium 386/486 CPUs. So I actually have problems reading vector instructions, while I have some theoretical knowledge about them.[… OTHER STUFF … ] ; ——– Disassembly ——————– 00 ALU_PUSH_BEFORE: ADDR(32) CNT(6) KCACHE0(CB2:0-15) KCACHE1(CB0:0-15)0 x: MOV R2.x, 0.0fz: SETGT_INT R0.z, 1, KC0[0].yt: MULLO_INT ____, R1.x, KC1[1].x1 w: ADD_INT ____, R0.x, PS02 y: ADD_INT R2.y, PV1.w, KC1[6].x3 x: PREDE_INT ____, R0.z, 0.0f UPDATE_EXEC_MASK UPDATE_PRED 01 JUMP POP_CNT(1) ADDR(9) 02 ALU: ADDR(38) CNT(5) KCACHE0(CB1:0-15)4 x: MOV R2.x, 0.0fy:

Originally posted 2013-11-06 03:34:42.