{"id":344,"date":"2022-08-30T14:59:47","date_gmt":"2022-08-30T14:59:47","guid":{"rendered":"https:\/\/unknownerror.org\/index.php\/2013\/11\/06\/problem-about-cpu-cycles-collection-of-common-programming-errors\/"},"modified":"2022-08-30T14:59:47","modified_gmt":"2022-08-30T14:59:47","slug":"problem-about-cpu-cycles-collection-of-common-programming-errors","status":"publish","type":"post","link":"https:\/\/unknownerror.org\/index.php\/2022\/08\/30\/problem-about-cpu-cycles-collection-of-common-programming-errors\/","title":{"rendered":"problem about cpu-cycles-Collection of common programming errors"},"content":{"rendered":"<ul>\n<li><img decoding=\"async\" src=\"http:\/\/www.gravatar.com\/avatar\/ccb682362be9020d7184e6669ec97ce6?s=32&amp;d=identicon&amp;r=PG\" \/><br \/>\nStefan K.<br \/>\nassembly gpu instruction-set pipelining cpu-cycles<br \/>\nI&#8217;m trying to understand what machine code the OpenCL compiler produces in order to optimize it. Therefore I used the tool m2s-opencl-kc (from multi2sim) to offline-compile my *.cl file and keep intermediate files (switch: -a) as the *.isa file. This *.isa contains a &#8220;Disassembly&#8221; section, which seems to be what I&#8217;m looking for&#8230;Note: My assembly knowledge is a bit &#8220;old&#8221;. I produced assembly for older CPUs like Pentium 386\/486 CPUs. So I actually have problems reading vector instructions, while I have some theoretical knowledge about them.[&#8230; OTHER STUFF &#8230; ] ; &#8212;&#8212;&#8211; Disassembly &#8212;&#8212;&#8212;&#8212;&#8212;&#8212;&#8211; 00 ALU_PUSH_BEFORE: ADDR(32) CNT(6) KCACHE0(CB2:0-15) KCACHE1(CB0:0-15)0 x: MOV R2.x, 0.0fz: SETGT_INT R0.z, 1, KC0[0].yt: MULLO_INT ____, R1.x, KC1[1].x1 w: ADD_INT ____, R0.x, PS02 y: ADD_INT R2.y, PV1.w, KC1[6].x3 x: PREDE_INT ____, R0.z, 0.0f UPDATE_EXEC_MASK UPDATE_PRED 01 JUMP POP_CNT(1) ADDR(9) 02 ALU: ADDR(38) CNT(5) KCACHE0(CB1:0-15)4 x: MOV R2.x, 0.0fy:<\/li>\n<\/ul>\n<p id=\"rop\"><small>Originally posted 2013-11-06 03:12:07. <\/small><\/p>","protected":false},"excerpt":{"rendered":"<p>Stefan K. assembly gpu instruction-set pipelining cpu-cycles I&#8217;m trying to understand what machine code the OpenCL compiler produces in order to optimize it. Therefore I used the tool m2s-opencl-kc (from multi2sim) to offline-compile my *.cl file and keep intermediate files (switch: -a) as the *.isa file. This *.isa contains a &#8220;Disassembly&#8221; section, which seems to [&hellip;]<\/p>\n","protected":false},"author":1,"featured_media":0,"comment_status":"closed","ping_status":"closed","sticky":false,"template":"","format":"standard","meta":{"footnotes":""},"categories":[1],"tags":[],"class_list":["post-344","post","type-post","status-publish","format-standard","hentry","category-uncategorized"],"_links":{"self":[{"href":"https:\/\/unknownerror.org\/index.php\/wp-json\/wp\/v2\/posts\/344","targetHints":{"allow":["GET"]}}],"collection":[{"href":"https:\/\/unknownerror.org\/index.php\/wp-json\/wp\/v2\/posts"}],"about":[{"href":"https:\/\/unknownerror.org\/index.php\/wp-json\/wp\/v2\/types\/post"}],"author":[{"embeddable":true,"href":"https:\/\/unknownerror.org\/index.php\/wp-json\/wp\/v2\/users\/1"}],"replies":[{"embeddable":true,"href":"https:\/\/unknownerror.org\/index.php\/wp-json\/wp\/v2\/comments?post=344"}],"version-history":[{"count":0,"href":"https:\/\/unknownerror.org\/index.php\/wp-json\/wp\/v2\/posts\/344\/revisions"}],"wp:attachment":[{"href":"https:\/\/unknownerror.org\/index.php\/wp-json\/wp\/v2\/media?parent=344"}],"wp:term":[{"taxonomy":"category","embeddable":true,"href":"https:\/\/unknownerror.org\/index.php\/wp-json\/wp\/v2\/categories?post=344"},{"taxonomy":"post_tag","embeddable":true,"href":"https:\/\/unknownerror.org\/index.php\/wp-json\/wp\/v2\/tags?post=344"}],"curies":[{"name":"wp","href":"https:\/\/api.w.org\/{rel}","templated":true}]}}